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| author | Linus Walleij <linus.walleij@linaro.org> | 2021-08-14 00:39:33 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-08-14 00:39:33 +0200 |
| commit | 8cd99e3e22e208e027e60efd2bcbd293c48845ba (patch) | |
| tree | f347516d3aa551fef437bf0d01f1ea0eb3777130 /include/dt-bindings/pinctrl | |
| parent | MAINTAINERS: Add maintainers for amd-pinctrl driver (diff) | |
| parent | pinctrl: renesas: Add RZ/G2L pin and gpio controller driver (diff) | |
| download | linux-8cd99e3e22e208e027e60efd2bcbd293c48845ba.tar.xz linux-8cd99e3e22e208e027e60efd2bcbd293c48845ba.zip | |
Merge tag 'renesas-pinctrl-for-v5.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v5.15 (take two)
- Add pin control and GPIO support for the new RZ/G2L SoC.
Diffstat (limited to 'include/dt-bindings/pinctrl')
| -rw-r--r-- | include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h new file mode 100644 index 000000000000..b48f8c7a5556 --- /dev/null +++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * This header provides constants for Renesas RZ/G2L family pinctrl bindings. + * + * Copyright (C) 2021 Renesas Electronics Corp. + * + */ + +#ifndef __DT_BINDINGS_RZG2L_PINCTRL_H +#define __DT_BINDINGS_RZG2L_PINCTRL_H + +#define RZG2L_PINS_PER_PORT 8 + +/* + * Create the pin index from its bank and position numbers and store in + * the upper 16 bits the alternate function identifier + */ +#define RZG2L_PORT_PINMUX(b, p, f) ((b) * RZG2L_PINS_PER_PORT + (p) | ((f) << 16)) + +/* Convert a port and pin label to its global pin index */ + #define RZG2L_GPIO(port, pin) ((port) * RZG2L_PINS_PER_PORT + (pin)) + +#endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */ |