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authorWang Xiaoyin <hw.wangxiaoyin@hisilicon.com>2017-03-30 08:48:02 +0200
committerWei Xu <xuwei5@hisilicon.com>2017-04-10 17:34:23 +0200
commit5a7e4774fd91b1c934806ea89b3ec6cc74c54159 (patch)
treee766d9fd2fbc89aa4f9f232de7a13064736dbc19 /include/dt-bindings/pinctrl
parentarm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board (diff)
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arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
Extend drive strength levels of the pins for Hi3660 Soc. Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'include/dt-bindings/pinctrl')
-rw-r--r--include/dt-bindings/pinctrl/hisi.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/dt-bindings/pinctrl/hisi.h b/include/dt-bindings/pinctrl/hisi.h
index 38f1ea879ea1..0359bfdc9119 100644
--- a/include/dt-bindings/pinctrl/hisi.h
+++ b/include/dt-bindings/pinctrl/hisi.h
@@ -56,4 +56,19 @@
#define DRIVE4_08MA (4 << 4)
#define DRIVE4_10MA (6 << 4)
+/* drive strength definition for hi3660 */
+#define DRIVE6_MASK (15 << 4)
+#define DRIVE6_04MA (0 << 4)
+#define DRIVE6_12MA (4 << 4)
+#define DRIVE6_19MA (8 << 4)
+#define DRIVE6_27MA (10 << 4)
+#define DRIVE6_32MA (15 << 4)
+#define DRIVE7_02MA (0 << 4)
+#define DRIVE7_04MA (1 << 4)
+#define DRIVE7_06MA (2 << 4)
+#define DRIVE7_08MA (3 << 4)
+#define DRIVE7_10MA (4 << 4)
+#define DRIVE7_12MA (5 << 4)
+#define DRIVE7_14MA (6 << 4)
+#define DRIVE7_16MA (7 << 4)
#endif