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| author | Samuel Holland <samuel@sholland.org> | 2023-01-01 00:14:28 +0100 |
|---|---|---|
| committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2023-01-08 22:06:10 +0100 |
| commit | 925b61ba2dafa9c13c9afa9b83a45d499cd73f2f (patch) | |
| tree | 4f490272f27bf7aa33bbd76780f02ee16e155b7f /include/dt-bindings/reset/sun20i-d1-ccu.h | |
| parent | clk: sunxi-ng: d1: Mark cpux clock as critical (diff) | |
| download | linux-925b61ba2dafa9c13c9afa9b83a45d499cd73f2f.tar.xz linux-925b61ba2dafa9c13c9afa9b83a45d499cd73f2f.zip | |
dt-bindings: clock: Add D1 CAN bus gates and resets
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'include/dt-bindings/reset/sun20i-d1-ccu.h')
| -rw-r--r-- | include/dt-bindings/reset/sun20i-d1-ccu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h index de9ff5203239..f8001cf50bf1 100644 --- a/include/dt-bindings/reset/sun20i-d1-ccu.h +++ b/include/dt-bindings/reset/sun20i-d1-ccu.h @@ -73,5 +73,7 @@ #define RST_BUS_DSP_CFG 63 #define RST_BUS_DSP_DBG 64 #define RST_BUS_RISCV_CFG 65 +#define RST_BUS_CAN0 66 +#define RST_BUS_CAN1 67 #endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */ |