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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2020-06-17 12:50:36 +0200 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-11-17 21:52:04 +0100 |
commit | 83f865d7e32e40b4903b1f83537c63fc5cdf1eb8 (patch) | |
tree | 08ebd3b09c5491532ab24f9542896be93a08966b /include/dt-bindings/reset | |
parent | reset: add BCM6345 reset controller driver (diff) | |
download | linux-83f865d7e32e40b4903b1f83537c63fc5cdf1eb8.tar.xz linux-83f865d7e32e40b4903b1f83537c63fc5cdf1eb8.zip |
mips: bmips: dts: add BCM6328 reset controller support
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'include/dt-bindings/reset')
-rw-r--r-- | include/dt-bindings/reset/bcm6328-reset.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/bcm6328-reset.h b/include/dt-bindings/reset/bcm6328-reset.h new file mode 100644 index 000000000000..0f3df87d47af --- /dev/null +++ b/include/dt-bindings/reset/bcm6328-reset.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_RESET_BCM6328_H +#define __DT_BINDINGS_RESET_BCM6328_H + +#define BCM6328_RST_SPI 0 +#define BCM6328_RST_EPHY 1 +#define BCM6328_RST_SAR 2 +#define BCM6328_RST_ENETSW 3 +#define BCM6328_RST_USBS 4 +#define BCM6328_RST_USBH 5 +#define BCM6328_RST_PCM 6 +#define BCM6328_RST_PCIE_CORE 7 +#define BCM6328_RST_PCIE 8 +#define BCM6328_RST_PCIE_EXT 9 +#define BCM6328_RST_PCIE_HARD 10 + +#endif /* __DT_BINDINGS_RESET_BCM6328_H */ |