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author | Mike Turquette <mturquette@linaro.org> | 2014-09-28 19:47:15 +0200 |
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committer | Mike Turquette <mturquette@linaro.org> | 2014-09-28 19:47:15 +0200 |
commit | 6e18ff26c2b529de06207caa2be9e5f1cf520972 (patch) | |
tree | 015fefb702a8650266c429167b09fddef5c61005 /include/dt-bindings | |
parent | clk: use uninitialized_var instead setting 'flags' to 0 directly. (diff) | |
parent | clk: hix5hd2: add I2C clocks (diff) | |
download | linux-6e18ff26c2b529de06207caa2be9e5f1cf520972.tar.xz linux-6e18ff26c2b529de06207caa2be9e5f1cf520972.zip |
Merge tag 'hix5hd2-clock-for-3.18-v2' of git://github.com/hisilicon/linux-hisi into clk-next
Hisilicon HiX5HD2 clock updates for 3.18-v2
- Add I2C clocks
- Add watchdog clocks
- Add sd clocks
- Add complex clock implementation to support sata, usb and ethernet
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/hix5hd2-clock.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index aad579a75802..fd29c174ba63 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -46,6 +46,7 @@ #define HIX5HD2_SFC_MUX 64 #define HIX5HD2_MMC_MUX 65 #define HIX5HD2_FEPHY_MUX 66 +#define HIX5HD2_SD_MUX 67 /* gate clocks */ #define HIX5HD2_SFC_RST 128 @@ -53,6 +54,32 @@ #define HIX5HD2_MMC_CIU_CLK 130 #define HIX5HD2_MMC_BIU_CLK 131 #define HIX5HD2_MMC_CIU_RST 132 +#define HIX5HD2_FWD_BUS_CLK 133 +#define HIX5HD2_FWD_SYS_CLK 134 +#define HIX5HD2_MAC0_PHY_CLK 135 +#define HIX5HD2_SD_CIU_CLK 136 +#define HIX5HD2_SD_BIU_CLK 137 +#define HIX5HD2_SD_CIU_RST 138 +#define HIX5HD2_WDG0_CLK 139 +#define HIX5HD2_WDG0_RST 140 +#define HIX5HD2_I2C0_CLK 141 +#define HIX5HD2_I2C0_RST 142 +#define HIX5HD2_I2C1_CLK 143 +#define HIX5HD2_I2C1_RST 144 +#define HIX5HD2_I2C2_CLK 145 +#define HIX5HD2_I2C2_RST 146 +#define HIX5HD2_I2C3_CLK 147 +#define HIX5HD2_I2C3_RST 148 +#define HIX5HD2_I2C4_CLK 149 +#define HIX5HD2_I2C4_RST 150 +#define HIX5HD2_I2C5_CLK 151 +#define HIX5HD2_I2C5_RST 152 + +/* complex */ +#define HIX5HD2_MAC0_CLK 192 +#define HIX5HD2_MAC1_CLK 193 +#define HIX5HD2_SATA_CLK 194 +#define HIX5HD2_USB_CLK 195 #define HIX5HD2_NR_CLKS 256 #endif /* __DTS_HIX5HD2_CLOCK_H */ |