Merge tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Renesas ARM Based SoC Updates for v4.18

* SoC
  - Change platform dependency to ARCH_RENESAS
    This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
    future.
  - Add the to Kconfig RZ/N1D (r9a06g032) SoC
  - Identify R-Car E3 (r8a77990) SoC
  - Identify and add minimal support for RZ/G1C (r8a77470) SoC

* R-Car SYSC
  - Add support for R-Car E3 (r8a77990) SoC
  - Remove unused inclusion of <linux/sys_soc.h>,
  - Make r8a77995_areas[] const.

* R-Car Reset
  - Add support for R-Car E3 (r8a77990) SoC

* Debug-LL
  - Add support for RZ/G1C (r8a77470) SoC

* tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}
  soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
  arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig
  arm: shmobile: Change platform dependency to ARCH_RENESAS
  soc: renesas: r8a77995-sysc: Cleanups
  soc: renesas: rcar-rst: Add support for R-Car E3
  soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions
  soc: renesas: identify R-Car E3
  ARM: debug-ll: Add support for r8a77470
  ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig
  ARM: shmobile: r8a77470: basic SoC support
  soc: renesas: rcar-sysc: Add r8a77470 support
  soc: renesas: rcar-rst: Add support for RZ/G1C
  soc: renesas: Identify RZ/G1C

Signed-off-by: Olof Johansson <olof@lixom.net>

2 files changed, 48 insertions, 0 deletions

diff --git a/include/dt-bindings/power/r8a77470-sysc.h b/include/dt-bindings/power/r8a77470-sysc.h
new file mode 100644
index 000000000000..8bf4db187c31
--- /dev/null
+++ b/include/dt-bindings/power/r8a77470-sysc.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77470_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77470_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77470_PD_CA7_CPU0		 5
+#define R8A77470_PD_CA7_CPU1		 6
+#define R8A77470_PD_SGX			20
+#define R8A77470_PD_CA7_SCU		21
+
+/* Always-on power area */
+#define R8A77470_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77470_SYSC_H__ */
diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h
new file mode 100644
index 000000000000..944d85beec15
--- /dev/null
+++ b/include/dt-bindings/power/r8a77990-sysc.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77990_PD_CA53_CPU0		5
+#define R8A77990_PD_CA53_CPU1		6
+#define R8A77990_PD_CR7			13
+#define R8A77990_PD_A3VC		14
+#define R8A77990_PD_3DG_A		17
+#define R8A77990_PD_3DG_B		18
+#define R8A77990_PD_CA53_SCU		21
+#define R8A77990_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A77990_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */