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| author | Stephen Boyd <sboyd@kernel.org> | 2018-06-04 21:32:24 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-06-04 21:32:24 +0200 |
| commit | fff2e33717607dcfd9b7c36b244471e3cb271e4b (patch) | |
| tree | 14a74ad3a406a1a3ae5b402808ba8f2724e91c77 /include/dt-bindings | |
| parent | Merge branches 'clk-allwinner', 'clk-rockchip', 'clk-tegra', 'clk-berlin' and... (diff) | |
| parent | clk: imx6sl: correct ocram_podf clock type (diff) | |
| parent | ARM: dts: imx7: correct enet ipg clock (diff) | |
| parent | clk: aspeed: Add 24MHz fixed clock (diff) | |
| download | linux-fff2e33717607dcfd9b7c36b244471e3cb271e4b.tar.xz linux-fff2e33717607dcfd9b7c36b244471e3cb271e4b.zip | |
Merge branches 'clk-imx6sx', 'clk-imx7d-enet' and 'clk-aspeed-24' into clk-next
* clk-imx6sx:
clk: imx6sl: correct ocram_podf clock type
clk: imx6sx: disable unnecessary clocks during clock initialization
clk: imx6sx: add missing lvds2 clock to the clock tree
* clk-imx7d-enet:
ARM: dts: imx7: correct enet ipg clock
clk: imx7d: correct enet clock CCGR registers
clk: imx7d: correct enet phy ref clock gates
* clk-aspeed-24:
clk: aspeed: Add 24MHz fixed clock