diff options
| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-04-21 23:18:44 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-04-21 23:18:44 +0200 |
| commit | 817de6b85914a3dda72b971c074d4d342965fba0 (patch) | |
| tree | df0a4563a04aadb8f8595f72392d66d65797c455 /include/dt-bindings | |
| parent | staging: kpc2000: add initial set of Daktronics drivers (diff) | |
| parent | Linux 5.1-rc6 (diff) | |
| download | linux-817de6b85914a3dda72b971c074d4d342965fba0.tar.xz linux-817de6b85914a3dda72b971c074d4d342965fba0.zip | |
Merge 5.1-rc6 into staging-next
We want the fixes in here as well as this resolves an iio driver merge
issue.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/sifive-fu540-prci.h | 18 | ||||
| -rw-r--r-- | include/dt-bindings/reset/amlogic,meson-g12a-reset.h | 5 |
2 files changed, 22 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/sifive-fu540-prci.h b/include/dt-bindings/clock/sifive-fu540-prci.h new file mode 100644 index 000000000000..6a0b70a37d78 --- /dev/null +++ b/include/dt-bindings/clock/sifive-fu540-prci.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018-2019 SiFive, Inc. + * Wesley Terpstra + * Paul Walmsley + */ + +#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H +#define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H + +/* Clock indexes for use by Device Tree data and the PRCI driver */ + +#define PRCI_CLK_COREPLL 0 +#define PRCI_CLK_DDRPLL 1 +#define PRCI_CLK_GEMGXLPLL 2 +#define PRCI_CLK_TLCLK 3 + +#endif diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h index 8063e8314eef..6d487c5eba2c 100644 --- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h +++ b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h @@ -51,7 +51,10 @@ #define RESET_SD_EMMC_A 44 #define RESET_SD_EMMC_B 45 #define RESET_SD_EMMC_C 46 -/* 47-60 */ +/* 47 */ +#define RESET_USB_PHY20 48 +#define RESET_USB_PHY21 49 +/* 50-60 */ #define RESET_AUDIO_CODEC 61 /* 62-63 */ /* RESET2 */ |