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authorTaniya Das <tdas@codeaurora.org>2019-02-11 08:39:28 +0100
committerStephen Boyd <sboyd@kernel.org>2019-02-21 23:18:13 +0100
commit9d575719ca9b8e177391addb2855be3911dc0d93 (patch)
tree67eb504d8ef11b8d81b29922136c9f61c810c9b4 /include/dt-bindings
parentclk: qcom: clk-rcg2: Introduce a cfg offset for RCGs (diff)
downloadlinux-9d575719ca9b8e177391addb2855be3911dc0d93.tar.xz
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clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock
The CFG/M/N/D registers are at an offset of 0x20 from the CMD register only for blsp1_uart3 clock, so add it for uart3 only. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings')
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