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| author | Nicolin Chen <nicoleotsuka@gmail.com> | 2020-10-08 02:37:45 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-10-27 20:52:30 +0100 |
| commit | 65abc8ef57009b95fcded5136aed8ccaff46b903 (patch) | |
| tree | f0e8ea98f873ab09da47cdbf5a5f5d63bac95116 /include/dt-bindings | |
| parent | memory: tegra: Sort tegra210_swgroups by reg address (diff) | |
| download | linux-65abc8ef57009b95fcded5136aed8ccaff46b903.tar.xz linux-65abc8ef57009b95fcded5136aed8ccaff46b903.zip | |
dt-bindings: memory: tegra: Add missing swgroups
According to Tegra X1 TRM, there are missing swgroups in the
tegra210_swgroups list. So this patch adds them in bindings.
Note that the TEGRA_SWGROUP_GPU (in list) should be actually
TEGRA_SWGROUP_GPUB (in TRM), yet TEGRA_SWGROUP_GPU (in TRM)
is not being used -- only TEGRA_SWGROUP_GPUB (in TRM) is. So
this patch does not add TEGRA_SWGROUP_GPU (in TRM) and keeps
TEGRA_SWGROUP_GPU (in list) as it is.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201008003746.25659-5-nicoleotsuka@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/memory/tegra210-mc.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/dt-bindings/memory/tegra210-mc.h b/include/dt-bindings/memory/tegra210-mc.h index cacf05617e03..5e082547f179 100644 --- a/include/dt-bindings/memory/tegra210-mc.h +++ b/include/dt-bindings/memory/tegra210-mc.h @@ -33,6 +33,16 @@ #define TEGRA_SWGROUP_AXIAP 28 #define TEGRA_SWGROUP_ETR 29 #define TEGRA_SWGROUP_TSECB 30 +#define TEGRA_SWGROUP_NV 31 +#define TEGRA_SWGROUP_NV2 32 +#define TEGRA_SWGROUP_PPCS1 33 +#define TEGRA_SWGROUP_DC1 34 +#define TEGRA_SWGROUP_PPCS2 35 +#define TEGRA_SWGROUP_HC1 36 +#define TEGRA_SWGROUP_SE1 37 +#define TEGRA_SWGROUP_TSEC1 38 +#define TEGRA_SWGROUP_TSECB1 39 +#define TEGRA_SWGROUP_NVDEC1 40 #define TEGRA210_MC_RESET_AFI 0 #define TEGRA210_MC_RESET_AVPC 1 |