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| author | Taniya Das <tdas@codeaurora.org> | 2020-05-17 12:04:20 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-27 04:22:05 +0200 |
| commit | 3005b17c5e2f426576530e3a69af2f7df16efb60 (patch) | |
| tree | 1c007bd53018b87fec6c9318cae0823f33bb61d0 /include/dt-bindings | |
| parent | clk: qcom: gcc: Add support for a new frequency for SC7180 (diff) | |
| download | linux-3005b17c5e2f426576530e3a69af2f7df16efb60.tar.xz linux-3005b17c5e2f426576530e3a69af2f7df16efb60.zip | |
dt-bindings: clock: Add gcc_sec_ctrl_clk_src clock ID
The gcc_sec_ctrl_clk_src clock is required to be controlled by the
secure controller driver.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1589709861-27580-3-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/qcom,gcc-sc7180.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-sc7180.h b/include/dt-bindings/clock/qcom,gcc-sc7180.h index 1258fd05db68..992b67b7e5e4 100644 --- a/include/dt-bindings/clock/qcom,gcc-sc7180.h +++ b/include/dt-bindings/clock/qcom,gcc-sc7180.h @@ -137,6 +137,7 @@ #define GCC_MSS_NAV_AXI_CLK 127 #define GCC_MSS_Q6_MEMNOC_AXI_CLK 128 #define GCC_MSS_SNOC_AXI_CLK 129 +#define GCC_SEC_CTRL_CLK_SRC 130 /* GCC resets */ #define GCC_QUSB2PHY_PRIM_BCR 0 |