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author | Stephen Boyd <sboyd@kernel.org> | 2024-05-17 03:09:08 +0200 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2024-05-17 03:09:08 +0200 |
commit | 4a35e6fc41179ebcb8552c7f4421bfba57de768c (patch) | |
tree | a93f80bd42c4f8d53160507c95b32b02bb69fe9a /include/dt-bindings | |
parent | Merge branches 'clk-stm', 'clk-renesas', 'clk-scmi' and 'clk-allwinner' into ... (diff) | |
parent | clk: bcm: rpi: Assign ->num before accessing ->hws (diff) | |
parent | Merge tag 'clk-imx-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abe... (diff) | |
parent | Merge tag 'clk-meson-v6.10-1' of https://github.com/BayLibre/clk-meson into c... (diff) | |
parent | dt-bindings: clock: fixed: Define a preferred node name (diff) | |
parent | Merge tag 'v6.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/... (diff) | |
download | linux-4a35e6fc41179ebcb8552c7f4421bfba57de768c.tar.xz linux-4a35e6fc41179ebcb8552c7f4421bfba57de768c.zip |
Merge branches 'clk-counted', 'clk-imx', 'clk-amlogic', 'clk-binding' and 'clk-rockchip' into clk-next
* clk-counted:
clk: bcm: rpi: Assign ->num before accessing ->hws
clk: bcm: dvp: Assign ->num before accessing ->hws
* clk-imx:
clk: imx: imx8mp: Convert to platform remove callback returning void
clk: imx: imx8mp: Switch to RUNTIME_PM_OPS()
clk: imx: add i.MX95 BLK CTL clk driver
dt-bindings: clock: support i.MX95 Display Master CSR module
dt-bindings: clock: support i.MX95 BLK CTL module
dt-bindings: clock: add i.MX95 clock header
clk: imx: imx8mp: Add pm_runtime support for power saving
* clk-amlogic:
clk: meson: s4: fix module autoloading
clk: meson: fix module license to GPL only
clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
clk: meson: add vclk driver
clk: meson: pll: print out pll name when unable to lock it
clk: meson: s4: pll: determine maximum register in regmap config
clk: meson: s4: peripherals: determine maximum register in regmap config
clk: meson: a1: pll: determine maximum register in regmap config
clk: meson: a1: peripherals: determine maximum register in regmap config
* clk-binding:
dt-bindings: clock: fixed: Define a preferred node name
* clk-rockchip:
clk: rockchip: rk3568: Add PLL rate for 724 MHz
clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
clk: rockchip: rk3588: Add reset line for HDMI Receiver
clk: rockchip: rk3568: Add missing USB480M_PHY mux
dt-bindings: reset: Define reset id used for HDMI Receiver
dt-bindings: clock: rockchip: add USB480M_PHY mux