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authorBiju Das <biju.das@bp.renesas.com>2018-09-11 12:12:49 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-09-19 16:39:45 +0200
commit016f9663156fe7e1402ef5ebaaca55d67f639966 (patch)
tree19b4d6719d52f1aaf8f7758de72c32a4a92060b1 /include/dt-bindings
parentclk: renesas: Add r8a7744 CPG Core Clock Definitions (diff)
downloadlinux-016f9663156fe7e1402ef5ebaaca55d67f639966.tar.xz
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clk: renesas: r8a7743: Add r8a7744 support
Add RZ/G1N (R8A7744) Clock Pulse Generator / Module Standby and Software Reset support. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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