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authorThor Thayer <thor.thayer@linux.intel.com>2017-02-22 18:10:16 +0100
committerPhilipp Zabel <p.zabel@pengutronix.de>2017-03-15 12:19:10 +0100
commit843fc75af8f5fb690656d1529b250584d8923d2c (patch)
treebef45ea9c84e00775b2ee6e8ae7b1b7f936214c9 /include/dt-bindings
parentreset: Add i.MX7 SRC reset driver (diff)
downloadlinux-843fc75af8f5fb690656d1529b250584d8923d2c.tar.xz
linux-843fc75af8f5fb690656d1529b250584d8923d2c.zip
dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
The Arria10 System Resource Chip reset controller handles the Arria10 peripheral PHYs. This patch adds the offsets for these PHYs. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/reset/altr,rst-mgr-a10sr.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/altr,rst-mgr-a10sr.h b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
new file mode 100644
index 000000000000..9855925e5256
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-a10sr.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright Intel Corporation (C) 2017. All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
+ *
+ * Adapted from altr,rst-mgr-a10.h
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
+
+/* Peripheral PHY resets */
+#define A10SR_RESET_ENET_HPS 0
+#define A10SR_RESET_PCIE 1
+#define A10SR_RESET_FILE 2
+#define A10SR_RESET_BQSPI 3
+#define A10SR_RESET_USB 4
+
+#define A10SR_RESET_NUM 5
+
+#endif