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| author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-08-22 11:15:39 +0200 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-09-09 10:13:02 +0200 |
| commit | 58d6506f327e3d192998ba03632f546da221b8d8 (patch) | |
| tree | cfa2d4694a0f02ca041d1c04610d376762738c7a /include/dt-bindings | |
| parent | clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller) (diff) | |
| download | linux-58d6506f327e3d192998ba03632f546da221b8d8.tar.xz linux-58d6506f327e3d192998ba03632f546da221b8d8.zip | |
clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
The PDMA{0,1} and EPLL clock IDs are added separately in this
patch so the patch can be merged to the arm-soc tree as dependency.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/exynos5410.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index 85b467b3a207..6cb4e90f81fc 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -19,6 +19,7 @@ #define CLK_FOUT_MPLL 4 #define CLK_FOUT_BPLL 5 #define CLK_FOUT_KPLL 6 +#define CLK_FOUT_EPLL 7 /* gate for special clocks (sclk) */ #define CLK_SCLK_UART0 128 @@ -55,6 +56,8 @@ #define CLK_MMC0 351 #define CLK_MMC1 352 #define CLK_MMC2 353 +#define CLK_PDMA0 362 +#define CLK_PDMA1 363 #define CLK_USBH20 365 #define CLK_USBD300 366 #define CLK_USBD301 367 |