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authorMarc Zyngier <marc.zyngier@arm.com>2014-07-08 13:09:04 +0200
committerChristoffer Dall <christoffer.dall@linaro.org>2014-09-19 03:48:57 +0200
commitc3c918361adcceb816c92b21dd95d2b46fb96a8f (patch)
tree055024f1f93ec5fce6851aac87f9f22bb79a0a4d /include/kvm
parentarm/arm64: KVM: vgic: kill VGIC_MAX_CPUS (diff)
downloadlinux-c3c918361adcceb816c92b21dd95d2b46fb96a8f.tar.xz
linux-c3c918361adcceb816c92b21dd95d2b46fb96a8f.zip
arm/arm64: KVM: vgic: handle out-of-range MMIO accesses
Now that we can (almost) dynamically size the number of interrupts, we're facing an interesting issue: We have to evaluate at runtime whether or not an access hits a valid register, based on the sizing of this particular instance of the distributor. Furthermore, the GIC spec says that accessing a reserved register is RAZ/WI. For this, add a new field to our range structure, indicating the number of bits a single interrupts uses. That allows us to find out whether or not the access is in range. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'include/kvm')
-rw-r--r--include/kvm/arm_vgic.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index 3b73d7845124..2767f939f47c 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -32,6 +32,7 @@
#define VGIC_V2_MAX_LRS (1 << 6)
#define VGIC_V3_MAX_LRS 16
+#define VGIC_MAX_IRQS 1024
/* Sanity checks... */
#if (KVM_MAX_VCPUS > 8)
@@ -42,7 +43,7 @@
#error "VGIC_NR_IRQS must be a multiple of 32"
#endif
-#if (VGIC_NR_IRQS > 1024)
+#if (VGIC_NR_IRQS > VGIC_MAX_IRQS)
#error "VGIC_NR_IRQS must be <= 1024"
#endif