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| author | Ian Munsie <imunsie@au1.ibm.com> | 2016-07-13 23:17:10 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-07-14 12:27:08 +0200 |
| commit | a2f67d5ee8d950caaa7a6144cf0bfb256500b73e (patch) | |
| tree | f7aa90965f8d64a5ab2a68cbe4ddb6fde3257024 /include/misc | |
| parent | cxl: Add preliminary workaround for CX4 interrupt limitation (diff) | |
| download | linux-a2f67d5ee8d950caaa7a6144cf0bfb256500b73e.tar.xz linux-a2f67d5ee8d950caaa7a6144cf0bfb256500b73e.zip | |
cxl: Add support for interrupts on the Mellanox CX4
The Mellanox CX4 in cxl mode uses a hybrid interrupt model, where
interrupts are routed from the networking hardware to the XSL using the
MSIX table, and from there will be transformed back into an MSIX
interrupt using the cxl style interrupts (i.e. using IVTE entries and
ranges to map a PE and AFU interrupt number to an MSIX address).
We want to hide the implementation details of cxl interrupts as much as
possible. To this end, we use a special version of the MSI setup &
teardown routines in the PHB while in cxl mode to allocate the cxl
interrupts and configure the IVTE entries in the process element.
This function does not configure the MSIX table - the CX4 card uses a
custom format in that table and it would not be appropriate to fill that
out in generic code. The rest of the functionality is similar to the
"Full MSI-X mode" described in the CAIA, and this could be easily
extended to support other adapters that use that mode in the future.
The interrupts will be associated with the default context. If the
maximum number of interrupts per context has been limited (e.g. by the
mlx5 driver), it will automatically allocate additional kernel contexts
to associate extra interrupts as required. These contexts will be
started using the same WED that was used to start the default context.
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'include/misc')
| -rw-r--r-- | include/misc/cxl-base.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/misc/cxl-base.h b/include/misc/cxl-base.h index bb7e629ae492..b2ebc91fe09a 100644 --- a/include/misc/cxl-base.h +++ b/include/misc/cxl-base.h @@ -43,6 +43,8 @@ void cxl_afu_put(struct cxl_afu *afu); void cxl_slbia(struct mm_struct *mm); bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu); void cxl_pci_disable_device(struct pci_dev *dev); +int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); +void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev); #else /* CONFIG_CXL_BASE */ @@ -52,6 +54,8 @@ static inline void cxl_afu_put(struct cxl_afu *afu) {} static inline void cxl_slbia(struct mm_struct *mm) {} static inline bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu) { return false; } static inline void cxl_pci_disable_device(struct pci_dev *dev) {} +static inline int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) { return -ENODEV; } +static inline void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev) {} #endif /* CONFIG_CXL_BASE */ |