diff options
| author | Yixun Lan <yixun.lan@amlogic.com> | 2018-04-28 12:21:11 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-05-01 17:29:59 +0200 |
| commit | efacb568c962470894dcda2bc51ea42af96a39eb (patch) | |
| tree | a145f3b0015a7bd64780a21dde916e4ab8ff8176 /include/net/sctp | |
| parent | dt-bindings: net: meson-dwmac: new compatible name for AXG SoC (diff) | |
| download | linux-efacb568c962470894dcda2bc51ea42af96a39eb.tar.xz linux-efacb568c962470894dcda2bc51ea42af96a39eb.zip | |
net: stmmac: dwmac-meson: extend phy mode setting
In the Meson-AXG SoC, the phy mode setting of PRG_ETH0 in the glue layer
is extended from bit[0] to bit[2:0].
There is no problem if we configure it to the RGMII 1000M PHY mode,
since the register setting is coincidentally compatible with previous one,
but for the RMII 100M PHY mode, the configuration need to be changed to
value - b100.
This patch was verified with a RTL8201F 100M ethernet PHY.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/net/sctp')
0 files changed, 0 insertions, 0 deletions