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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2015-05-26 14:42:57 +0200 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-06-04 00:17:07 +0200 |
| commit | 4d52b2acefdfceae0e47ed08324a96f511dc80b1 (patch) | |
| tree | 7348889850e9f896bda2842ad0e3c15165832fad /include/scsi | |
| parent | clk: socfpga: add a clock driver for the Arria 10 platform (diff) | |
| download | linux-4d52b2acefdfceae0e47ed08324a96f511dc80b1.tar.xz linux-4d52b2acefdfceae0e47ed08324a96f511dc80b1.zip | |
clk: mvebu: add missing CESA gate clk
Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'include/scsi')
0 files changed, 0 insertions, 0 deletions