diff options
author | Dmitry Osipenko <digetx@gmail.com> | 2018-04-13 13:33:49 +0200 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2018-04-30 10:12:21 +0200 |
commit | 20e92462cdfb2772e9d784ec355c90b61ec10222 (patch) | |
tree | a03482c41058a5faa820ab6d2235b871bdffb939 /include/soc | |
parent | memory: tegra: Squash tegra20-mc into common tegra-mc driver (diff) | |
download | linux-20e92462cdfb2772e9d784ec355c90b61ec10222.tar.xz linux-20e92462cdfb2772e9d784ec355c90b61ec10222.zip |
memory: tegra: Introduce memory client hot reset
In order to reset busy HW properly, memory controller needs to be
involved, otherwise it is possible to get corrupted memory or hang machine
if HW was reset during DMA. Introduce memory client 'hot reset' that will
be used for resetting of busy HW.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc')
-rw-r--r-- | include/soc/tegra/mc.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index bea7fe776825..b43f37fea096 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -9,6 +9,7 @@ #ifndef __SOC_TEGRA_MC_H__ #define __SOC_TEGRA_MC_H__ +#include <linux/reset-controller.h> #include <linux/types.h> struct clk; @@ -95,6 +96,30 @@ static inline void tegra_smmu_remove(struct tegra_smmu *smmu) } #endif +struct tegra_mc_reset { + const char *name; + unsigned long id; + unsigned int control; + unsigned int status; + unsigned int reset; + unsigned int bit; +}; + +struct tegra_mc_reset_ops { + int (*hotreset_assert)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*hotreset_deassert)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*block_dma)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + bool (*dma_idling)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*unblock_dma)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); + int (*reset_status)(struct tegra_mc *mc, + const struct tegra_mc_reset *rst); +}; + struct tegra_mc_soc { const struct tegra_mc_client *clients; unsigned int num_clients; @@ -110,6 +135,10 @@ struct tegra_mc_soc { const struct tegra_smmu_soc *smmu; u32 intmask; + + const struct tegra_mc_reset_ops *reset_ops; + const struct tegra_mc_reset *resets; + unsigned int num_resets; }; struct tegra_mc { @@ -124,6 +153,10 @@ struct tegra_mc { struct tegra_mc_timing *timings; unsigned int num_timings; + + struct reset_controller_dev reset; + + spinlock_t lock; }; void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); |