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| author | Paul Walmsley <paul@pwsan.com> | 2015-06-04 21:33:48 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-08-13 16:07:52 +0200 |
| commit | 3c01cf3befa66cc21f06672685cf59a53056887a (patch) | |
| tree | 0dc2664bc3b5851928b2e4eef74e9214820015e7 /include/soc | |
| parent | memory: tegra: Expose supported rates via debugfs (diff) | |
| download | linux-3c01cf3befa66cc21f06672685cf59a53056887a.tar.xz linux-3c01cf3befa66cc21f06672685cf59a53056887a.zip | |
memory: tegra: Add support for a variable-size client ID bitfield
Recent versions of the Tegra MC hardware extend the size of the client
ID bitfield in the MC_ERR_STATUS register by one bit. While one could
simply extend the bitfield for older hardware, that would allow data
from reserved bits into the driver code, which is generally a bad idea
on principle. So this patch instead passes in the client ID mask from
from the per-SoC MC data.
There's no MC support for T210 (yet), but when that support winds up
in the kernel, the appropriate soc->client_id_mask value for that chip
will be 0xff.
Based on an original patch by David Ung <davidu@nvidia.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: David Ung <davidu@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc')
| -rw-r--r-- | include/soc/tegra/mc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 1ab2813273cd..370f2909ec19 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -102,6 +102,8 @@ struct tegra_mc_soc { unsigned int num_address_bits; unsigned int atom_size; + u8 client_id_mask; + const struct tegra_smmu_soc *smmu; }; |