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authorAlex Deucher <alexander.deucher@amd.com>2014-08-28 16:59:05 +0200
committerAlex Deucher <alexander.deucher@amd.com>2014-09-10 17:29:46 +0200
commitf266f04d33e5265e2f61ffc9d2b2f97214804995 (patch)
tree845df643f57e29098fa63f5fd1a844d424a6362f /include/uapi
parentdrm/radeon: Clean up assignment of TTM placement lpfn member for pinning (diff)
downloadlinux-f266f04d33e5265e2f61ffc9d2b2f97214804995.tar.xz
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drm/radeon: add RADEON_GEM_NO_CPU_ACCESS BO creation flag (v4)
Allows pinning of buffers in the non-CPU visible portion of vram. v2: incorporate Michel's comments. v3: rebase on Michel's patch v4: rebase on Michel's v2 patch Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/radeon_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index f755f20d2b5c..50d0fb41a3bf 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -803,6 +803,8 @@ struct drm_radeon_gem_info {
#define RADEON_GEM_GTT_WC (1 << 2)
/* BO is expected to be accessed by the CPU */
#define RADEON_GEM_CPU_ACCESS (1 << 3)
+/* CPU access is not expected to work for this BO */
+#define RADEON_GEM_NO_CPU_ACCESS (1 << 4)
struct drm_radeon_gem_create {
uint64_t size;