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author | Wong Vee Khee <vee.khee.wong@ni.com> | 2017-06-01 11:43:06 +0200 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-06-19 23:54:53 +0200 |
commit | 56c1af4606f04048e3ae9ab2027a708b9684ff37 (patch) | |
tree | 4797daa24a91f388a42b95c1cd5568507ca1c1e7 /include/uapi | |
parent | PCI: Test INTx masking during enumeration, not at run-time (diff) | |
download | linux-56c1af4606f04048e3ae9ab2027a708b9684ff37.tar.xz linux-56c1af4606f04048e3ae9ab2027a708b9684ff37.zip |
PCI: Add sysfs max_link_speed/width, current_link_speed/width, etc
Expose PCIe bridges attributes such as secondary bus number, subordinate
bus number, max link speed and link width, current link speed and link
width via sysfs in /sys/bus/pci/devices/...
This information is available via lspci, but that requires root privilege.
Signed-off-by: Wong Vee Khee <vee.khee.wong@ni.com>
Signed-off-by: Hui Chun Ong <hui.chun.ong@ni.com>
[bhelgaas: changelog, return errors early to unindent usual case, return
errors with same style throughout]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index d56bb0051009..c22d3ebaca20 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -517,6 +517,7 @@ #define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ #define PCI_EXP_LNKCAP_SLS_2_5GB 0x00000001 /* LNKCAP2 SLS Vector bit 0 */ #define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */ +#define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */ #define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ #define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */ |