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authorDave Airlie <airlied@redhat.com>2016-09-28 03:09:59 +0200
committerDave Airlie <airlied@redhat.com>2016-09-28 03:09:59 +0200
commitf8049dd865a1de8b494c16a4cd18ee15fa896810 (patch)
tree37b874acba1392e97864dc24692736210543a4e4 /include/uapi
parentMerge tag 'topic/drm-misc-2016-09-25' of git://anongit.freedesktop.org/drm-in... (diff)
parentdrm/msm: bump kernel api version for explicit fencing (diff)
downloadlinux-f8049dd865a1de8b494c16a4cd18ee15fa896810.tar.xz
linux-f8049dd865a1de8b494c16a4cd18ee15fa896810.zip
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
A bit smaller pull-req this time around. Some continued DT binding cleanup to get the corresponding dts bits merged upstream (through other trees). And explicit fence-fd support for submit ioctl. * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/msm: bump kernel api version for explicit fencing drm/msm: submit support for out-fences drm/msm: move fence allocation out of msm_gpu_submit() drm/msm: submit support for in-fences drm/msm: extend the submit ioctl to pass in flags drm/msm/mdp5: Set rotation property initial value to DRM_ROTATE_0 insted of 0 drm/msm/hdmi: don't print error when adding i2c adapter fails drm/msm/mdp4: mark symbols static where possible drm/msm: Remove call to reservation_object_test_signaled_rcu before wait drm/msm/hdmi: Clean up HDMI gpio DT bindings drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/msm_drm.h22
1 files changed, 21 insertions, 1 deletions
diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
index 49f778de8e06..8c51e8a0df89 100644
--- a/include/uapi/drm/msm_drm.h
+++ b/include/uapi/drm/msm_drm.h
@@ -42,6 +42,15 @@ extern "C" {
#define MSM_PIPE_2D1 0x02
#define MSM_PIPE_3D0 0x10
+/* The pipe-id just uses the lower bits, so can be OR'd with flags in
+ * the upper 16 bits (which could be extended further, if needed, maybe
+ * we extend/overload the pipe-id some day to deal with multiple rings,
+ * but even then I don't think we need the full lower 16 bits).
+ */
+#define MSM_PIPE_ID_MASK 0xffff
+#define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK)
+#define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK)
+
/* timeouts are specified in clock-monotonic absolute times (to simplify
* restarting interrupted ioctls). The following struct is logically the
* same as 'struct timespec' but 32/64b ABI safe.
@@ -175,17 +184,28 @@ struct drm_msm_gem_submit_bo {
__u64 presumed; /* in/out, presumed buffer address */
};
+/* Valid submit ioctl flags: */
+#define MSM_SUBMIT_NO_IMPLICIT 0x80000000 /* disable implicit sync */
+#define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */
+#define MSM_SUBMIT_FENCE_FD_OUT 0x20000000 /* enable output fence_fd */
+#define MSM_SUBMIT_FLAGS ( \
+ MSM_SUBMIT_NO_IMPLICIT | \
+ MSM_SUBMIT_FENCE_FD_IN | \
+ MSM_SUBMIT_FENCE_FD_OUT | \
+ 0)
+
/* Each cmdstream submit consists of a table of buffers involved, and
* one or more cmdstream buffers. This allows for conditional execution
* (context-restore), and IB buffers needed for per tile/bin draw cmds.
*/
struct drm_msm_gem_submit {
- __u32 pipe; /* in, MSM_PIPE_x */
+ __u32 flags; /* MSM_PIPE_x | MSM_SUBMIT_x */
__u32 fence; /* out */
__u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_cmds; /* in, number of submit_cmd's */
__u64 __user bos; /* in, ptr to array of submit_bo's */
__u64 __user cmds; /* in, ptr to array of submit_cmd's */
+ __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
};
/* The normal way to synchronize with the GPU is just to CPU_PREP on