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| author | Weili Qian <qianweili@huawei.com> | 2022-09-09 11:46:57 +0200 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2022-09-16 12:29:44 +0200 |
| commit | c832da79cbf9448e7ece097c3a93996b4c74a83e (patch) | |
| tree | 2cefdeadd5b6af19e29fdac3618780f96fae6005 /include/uapi | |
| parent | crypto: hisilicon/qm - get qp num and depth from hardware registers (diff) | |
| download | linux-c832da79cbf9448e7ece097c3a93996b4c74a83e.tar.xz linux-c832da79cbf9448e7ece097c3a93996b4c74a83e.zip | |
crypto: hisilicon/qm - add UACCE_CMD_QM_SET_QP_INFO support
To be compatible with accelerator devices of different
versions, 'UACCE_CMD_QM_SET_QP_INFO' ioctl is added to obtain
queue information in userspace, including queue depth and buffer
description size.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/misc/uacce/hisi_qm.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/include/uapi/misc/uacce/hisi_qm.h b/include/uapi/misc/uacce/hisi_qm.h index 1faef5ff87ef..3e66dbc2f323 100644 --- a/include/uapi/misc/uacce/hisi_qm.h +++ b/include/uapi/misc/uacce/hisi_qm.h @@ -14,11 +14,26 @@ struct hisi_qp_ctx { __u16 qc_type; }; +/** + * struct hisi_qp_info - User data for hisi qp. + * @sqe_size: Submission queue element size + * @sq_depth: The number of sqe + * @cq_depth: The number of cqe + * @reserved: Reserved data + */ +struct hisi_qp_info { + __u32 sqe_size; + __u16 sq_depth; + __u16 cq_depth; + __u64 reserved; +}; + #define HISI_QM_API_VER_BASE "hisi_qm_v1" #define HISI_QM_API_VER2_BASE "hisi_qm_v2" #define HISI_QM_API_VER3_BASE "hisi_qm_v3" /* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */ #define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx) - +/* UACCE_CMD_QM_SET_QP_INFO: Set qp depth and BD size */ +#define UACCE_CMD_QM_SET_QP_INFO _IOWR('H', 11, struct hisi_qp_info) #endif |