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| author | Kishon Vijay Abraham I <kishon@ti.com> | 2021-03-19 13:41:28 +0100 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2021-03-31 13:13:21 +0200 |
| commit | 1436ec309e6251b372b757bfacf88f5954b8f3fd (patch) | |
| tree | c2ff0c57294a816fd0c801f41d448a43b1fbdbc6 /include/video/omapfb_dss.h | |
| parent | phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) (diff) | |
| download | linux-1436ec309e6251b372b757bfacf88f5954b8f3fd.tar.xz linux-1436ec309e6251b372b757bfacf88f5954b8f3fd.zip | |
phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocks
Get pll_cmnlc and pll_cmnlc1 optional clocks and enable them.
This will enable REFRCV/1 in case the pll_cmnlc/1 takes input
from REFRCV/1 respectively.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210319124128.13308-14-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include/video/omapfb_dss.h')
0 files changed, 0 insertions, 0 deletions