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authorAnton Blanchard <anton@samba.org>2006-06-10 12:18:39 +0200
committerPaul Mackerras <paulus@samba.org>2006-06-15 11:31:25 +0200
commit3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1 (patch)
treeafcd54f2ad36353abcf2282fdf15a05e77fcba4a /include
parent[POWERPC] Editable kernel command-line in zImage binary. (diff)
downloadlinux-3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1.tar.xz
linux-3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1.zip
[POWERPC] 64bit FPSCR support
Forthcoming machines will extend the FPSCR to 64 bits. We already had a 64-bit save area for the FPSCR, but we need to use a new form of the mtfsf instruction. Fortunately this new form is decoded as an ordinary mtfsf by existing 64-bit processors. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/reg.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 3779b21a7c71..bfc7dc14ffcc 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -499,6 +499,19 @@
#define MMCR0_PMC2_LOADMISSTIME 0x5
#endif
+/*
+ * An mtfsf instruction with the L bit set. On CPUs that support this a
+ * full 64bits of FPSCR is restored and on other CPUs it is ignored.
+ *
+ * Until binutils gets the new form of mtfsf, hardwire the instruction.
+ */
+#ifdef CONFIG_PPC64
+#define MTFSF_L(REG) \
+ .long (0xfc00058e | ((0xff) << 17) | ((REG) << 11) | (1 << 25))
+#else
+#define MTFSF_L(REG) mtfsf 0xff, (REG)
+#endif
+
/* Processor Version Register (PVR) field extraction */
#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */