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authorZhenyu Wang <zhenyu.z.wang@intel.com>2008-11-17 06:58:11 +0100
committerEric Anholt <eric@anholt.net>2009-04-22 02:22:53 +0200
commit72021788678523047161e97b3dfed695e802a5fd (patch)
treeb62aba6f0d5592d75c0c2409b4f0bb08da3bc8fa /include
parentdrm/i915: Enable ASLE if present (diff)
downloadlinux-72021788678523047161e97b3dfed695e802a5fd.tar.xz
linux-72021788678523047161e97b3dfed695e802a5fd.zip
drm/i915: add support for G41 chipset
This had been delayed for some time due to failure to work on the one piece of G41 hardware we had, and lack of success reports from anybody else. Current hardware appears to be OK. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> [anholt: hand-applied due to conflicts with IGD patches] Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'include')
-rw-r--r--include/drm/drm_pciids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 9477af01a639..fc55db780199 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -532,6 +532,7 @@
{0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
{0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
{0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
+ {0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
{0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
{0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
{0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \