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authorArun Kumar K <arun.kk@samsung.com>2014-07-11 01:03:59 +0200
committerKukjin Kim <kgene.kim@samsung.com>2014-07-11 01:03:59 +0200
commitc0fb262bf226a5c943e4309662353d5fb905310a (patch)
tree5cd9e80b72b26316e25b099a04320300ca70203d /include
parentARM: EXYNOS: Add support for clock handling in power domain (diff)
downloadlinux-c0fb262bf226a5c943e4309662353d5fb905310a.tar.xz
linux-c0fb262bf226a5c943e4309662353d5fb905310a.zip
clk: exynos5420: Add IDs for clocks used in PD mfc
Adds IDs for MUX clocks to be used by power domain for MFC for doing re-parenting while pd on/off. Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/exynos5420.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 97dcb89d37d3..3fc08ff24fa9 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -203,6 +203,8 @@
#define CLK_MOUT_G3D 641
#define CLK_MOUT_VPLL 642
#define CLK_MOUT_MAUDIO0 643
+#define CLK_MOUT_USER_ACLK333 644
+#define CLK_MOUT_SW_ACLK333 645
/* divider clocks */
#define CLK_DOUT_PIXEL 768