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authorSimon Guinot <sguinot@lacie.com>2010-09-17 23:33:51 +0200
committerDan Williams <dan.j.williams@intel.com>2010-09-23 23:14:22 +0200
commitcc60f8878eab892c03d06b10f389232b9b66bd83 (patch)
tree1f2cc0671c1f84c8928c261700f370771d510cbb /include
parentmissing inline keyword for static function in linux/dmaengine.h (diff)
downloadlinux-cc60f8878eab892c03d06b10f389232b9b66bd83.tar.xz
linux-cc60f8878eab892c03d06b10f389232b9b66bd83.zip
dmaengine: fix interrupt clearing for mv_xor
When using simultaneously the two DMA channels on a same engine, some transfers are never completed. For example, an endless lock can occur while writing heavily on a RAID5 array (with async-tx offload support enabled). Note that this issue can also be reproduced by using the DMA test client. On a same engine, the interrupt cause register is shared between two DMA channels. This patch make sure that the cause bit is only cleared for the requested channel. Signed-off-by: Simon Guinot <sguinot@lacie.com> Tested-by: Luc Saillard <luc@saillard.org> Acked-by: saeed bishara <saeed.bishara@gmail.com> Cc: <stable@kernel.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include')
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