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author | Jesper Nilsson <jesper.nilsson@axis.com> | 2008-01-15 11:59:12 +0100 |
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committer | Jesper Nilsson <jesper.nilsson@axis.com> | 2008-02-08 11:06:24 +0100 |
commit | 1e5915b173c4a729a818dbef020e166ceeaa321b (patch) | |
tree | 2c6aa14aceb389eac9a902d3f6bcc1ca5f679807 /include | |
parent | CRIS: Merge axisflashmap.h with Axis internal changes. (diff) | |
download | linux-1e5915b173c4a729a818dbef020e166ceeaa321b.tar.xz linux-1e5915b173c4a729a818dbef020e166ceeaa321b.zip |
CRIS v32: Update asm-cris/arch-v32/irq.h for ETRAX FS and ARTPEC-3
- Correct include to use <>
- Rework calculation of number of IRQs and exceptions we have.
- Remove useless "mask" argument to BUILD_IRQ macro
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-cris/arch-v32/irq.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/include/asm-cris/arch-v32/irq.h b/include/asm-cris/arch-v32/irq.h index bac94ee6bc90..9e4c9fbdfddf 100644 --- a/include/asm-cris/arch-v32/irq.h +++ b/include/asm-cris/arch-v32/irq.h @@ -1,12 +1,17 @@ #ifndef _ASM_ARCH_IRQ_H #define _ASM_ARCH_IRQ_H -#include "hwregs/intr_vect.h" +#include <hwregs/intr_vect.h> /* Number of non-cpu interrupts. */ -#define NR_IRQS 0x50 /* Exceptions + IRQs */ -#define NR_REAL_IRQS 0x20 /* IRQs */ +#define NR_IRQS NBR_INTR_VECT /* Exceptions + IRQs */ #define FIRST_IRQ 0x31 /* Exception number for first IRQ */ +#define NR_REAL_IRQS (NBR_INTR_VECT - FIRST_IRQ) /* IRQs */ +#if NR_REAL_IRQS > 32 +#define MACH_IRQS 64 +#else +#define MACH_IRQS 32 +#endif #ifndef __ASSEMBLY__ /* Global IRQ vector. */ @@ -73,7 +78,7 @@ void set_exception_vector(int n, irqvectptr addr); * which will acknowledge the interrupt, is run. The actual blocking is made * by crisv32_do_IRQ. */ -#define BUILD_IRQ(nr, mask) \ +#define BUILD_IRQ(nr) \ void IRQ_NAME(nr); \ __asm__ ( \ ".text\n\t" \ @@ -81,7 +86,7 @@ __asm__ ( \ SAVE_ALL \ KGDB_FIXUP \ "move.d "#nr",$r10\n\t" \ - "move.d $sp,$r12\n\t" \ + "move.d $sp, $r12\n\t" \ "jsr crisv32_do_IRQ\n\t" \ "moveq 1, $r11\n\t" \ "jump ret_from_intr\n\t" \ |