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author | Raed Salem <raeds@mellanox.com> | 2017-07-30 10:02:51 +0200 |
---|---|---|
committer | Saeed Mahameed <saeedm@mellanox.com> | 2017-09-28 06:23:09 +0200 |
commit | 16f1c5bb3ed75b3cf3ced537db40f7e1a244debe (patch) | |
tree | a61474d598ef7cdc97934816a0ad82cd34b10fae /include | |
parent | net/mlx5: Fix FPGA capability location (diff) | |
download | linux-16f1c5bb3ed75b3cf3ced537db40f7e1a244debe.tar.xz linux-16f1c5bb3ed75b3cf3ced537db40f7e1a244debe.zip |
net/mlx5: Check device capability for maximum flow counters
Added check for the maximal number of flow counters attached
to rule (FTE).
Fixes: bd5251dbf156b ('net/mlx5_core: Introduce flow steering destination of type counter')
Signed-off-by: Raed Salem <raeds@mellanox.com>
Reviewed-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index a528b35a022e..69772347f866 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -327,7 +327,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits { u8 reserved_at_80[0x18]; u8 log_max_destination[0x8]; - u8 reserved_at_a0[0x18]; + u8 log_max_flow_counter[0x8]; + u8 reserved_at_a8[0x10]; u8 log_max_flow[0x8]; u8 reserved_at_c0[0x40]; |