diff options
| author | James Bottomley <James.Bottomley@SteelEye.com> | 2006-02-24 22:04:14 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-24 23:31:38 +0100 |
| commit | 2b932f6cf052920fb3a6281499e08209b08f5086 (patch) | |
| tree | c2710e09dd40ee9733bcd77234d6373acec741d2 /include | |
| parent | [PATCH] page migration: Fix MPOL_INTERLEAVE behavior for migration via mbind() (diff) | |
| download | linux-2b932f6cf052920fb3a6281499e08209b08f5086.tar.xz linux-2b932f6cf052920fb3a6281499e08209b08f5086.zip | |
[PATCH] x86: fix broken SMP boot sequence
Recent GDT changes broke the SMP boot sequence if the booting CPU is
numbered anything other than zero. There's also a subtle source of error
in that the boot time CPU now uses cpu_gdt_table (which is actually the GDT
for booting CPUs in head.S). This patch fixes both problems by making GDT
descriptors themselves allocated from a per_cpu area and switching to them
in cpu_init(), which now means that cpu_gdt_table is exclusively used for
booting CPUs again.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Matt Tolentino <metolent@snoqualmie.dp.intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-i386/desc.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h index 494e73bca095..89b8b82c82b3 100644 --- a/include/asm-i386/desc.h +++ b/include/asm-i386/desc.h @@ -24,11 +24,13 @@ struct Xgt_desc_struct { unsigned short pad; } __attribute__ ((packed)); -extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; +extern struct Xgt_desc_struct idt_descr; +DECLARE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr); + static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu) { - return ((struct desc_struct *)cpu_gdt_descr[cpu].address); + return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address; } #define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) |