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authorThomas Gleixner <tglx@linutronix.de>2011-03-28 14:10:52 +0200
committerThomas Gleixner <tglx@linutronix.de>2011-03-28 16:55:10 +0200
commit32f4125ebffee4f3c4dbc6a437fc656129eb9e60 (patch)
treed64c6bb7ba40c33734896303734416ea5b4f3290 /include
parentgenirq: Split irq_set_affinity() so it can be called with lock held. (diff)
downloadlinux-32f4125ebffee4f3c4dbc6a437fc656129eb9e60.tar.xz
linux-32f4125ebffee4f3c4dbc6a437fc656129eb9e60.zip
genirq: Move INPROGRESS, MASKED and DISABLED state flags to irq_data
We really need these flags for some of the interrupt chips. Move it from internal state to irq_data and provide proper accessors. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: David Daney <ddaney@caviumnetworks.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/irq.h17
1 files changed, 15 insertions, 2 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h
index a10717e1c1f3..18aacccb0fae 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -174,8 +174,9 @@ struct irq_data {
* from suspend
* IRDQ_MOVE_PCNTXT - Interrupt can be moved in process
* context
- * IRQD_IRQ_DISABLED - Some chip function need to know the
- * disabled state.
+ * IRQD_IRQ_DISABLED - Disabled state of the interrupt
+ * IRQD_IRQ_MASKED - Masked state of the interrupt
+ * IRQD_IRQ_INPROGRESS - In progress state of the interrupt
*/
enum {
IRQD_TRIGGER_MASK = 0xf,
@@ -187,6 +188,8 @@ enum {
IRQD_WAKEUP_STATE = (1 << 14),
IRQD_MOVE_PCNTXT = (1 << 15),
IRQD_IRQ_DISABLED = (1 << 16),
+ IRQD_IRQ_MASKED = (1 << 17),
+ IRQD_IRQ_INPROGRESS = (1 << 18),
};
static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
@@ -243,6 +246,16 @@ static inline bool irqd_irq_disabled(struct irq_data *d)
return d->state_use_accessors & IRQD_IRQ_DISABLED;
}
+static inline bool irqd_irq_masked(struct irq_data *d)
+{
+ return d->state_use_accessors & IRQD_IRQ_MASKED;
+}
+
+static inline bool irqd_irq_inprogress(struct irq_data *d)
+{
+ return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
+}
+
/**
* struct irq_chip - hardware interrupt chip descriptor
*