diff options
| author | Olof Johansson <olof@lixom.net> | 2007-02-04 23:36:53 +0100 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-02-07 04:03:22 +0100 |
| commit | c388cfebbf22acd2b6adf757b35e28d4be66ac7c (patch) | |
| tree | dc367aa9c8dd94dddefad9062bf43ac16dcd1ea6 /include | |
| parent | [POWERPC] pasemi: Implement restart (diff) | |
| download | linux-c388cfebbf22acd2b6adf757b35e28d4be66ac7c.tar.xz linux-c388cfebbf22acd2b6adf757b35e28d4be66ac7c.zip | |
[POWERPC] pasemi: SMP timebase sync
Timebase update is simple on PA6T, since global updates can be done from
one core by writing to an SPR.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-powerpc/reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 923df6ceaa5c..0d7f0164ed81 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h @@ -392,6 +392,12 @@ #define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ #define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ +#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */ +#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */ +#define TBCTL_RESTART 0x0000000100000000ull /* Restart all tbs */ +#define TBCTL_UPDATE_UPPER 0x0000000200000000ull /* Set upper 32 bits */ +#define TBCTL_UPDATE_LOWER 0x0000000300000000ull /* Set lower 32 bits */ + #ifndef SPRN_SVR #define SPRN_SVR 0x11E /* System Version Register */ #endif |