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author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-05 23:17:40 +0200 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-05 23:17:40 +0200 |
commit | d06e7a56d91328267a96b1a4df4ede7529f829e8 (patch) | |
tree | b8034a35c50986d93cb7c0f691f9471bc27b74d1 /include | |
parent | Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6 (diff) | |
parent | [SPARC64]: Fix IRQ retry interval timer value on sparc64 PCI controllers. (diff) | |
download | linux-d06e7a56d91328267a96b1a4df4ede7529f829e8.tar.xz linux-d06e7a56d91328267a96b1a4df4ede7529f829e8.zip |
Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sparc64/irq.h | 49 | ||||
-rw-r--r-- | include/asm-sparc64/pbm.h | 3 | ||||
-rw-r--r-- | include/asm-sparc64/signal.h | 15 | ||||
-rw-r--r-- | include/linux/compat_ioctl.h | 19 |
4 files changed, 41 insertions, 45 deletions
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index 018e2e46082b..8b70edcb80dc 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h @@ -16,6 +16,18 @@ #include <asm/pil.h> #include <asm/ptrace.h> +struct ino_bucket; + +#define MAX_IRQ_DESC_ACTION 4 + +struct irq_desc { + void (*pre_handler)(struct ino_bucket *, void *, void *); + void *pre_handler_arg1; + void *pre_handler_arg2; + u32 action_active_mask; + struct irqaction action[MAX_IRQ_DESC_ACTION]; +}; + /* You should not mess with this directly. That's the job of irq.c. * * If you make changes here, please update hand coded assembler of @@ -42,24 +54,11 @@ struct ino_bucket { /* Miscellaneous flags. */ /*0x06*/unsigned char flags; - /* This is used to deal with IBF_DMA_SYNC on - * Sabre systems. - */ -/*0x07*/unsigned char synctab_ent; - - /* Reference to handler for this IRQ. If this is - * non-NULL this means it is active and should be - * serviced. Else the pending member is set to one - * and later registry of the interrupt checks for - * this condition. - * - * Normally this is just an irq_action structure. - * But, on PCI, if multiple interrupt sources behind - * a bridge have multiple interrupt sources that share - * the same INO bucket, this points to an array of - * pointers to four IRQ action structures. - */ -/*0x08*/void *irq_info; + /* Currently unused. */ +/*0x07*/unsigned char __pad; + + /* Reference to IRQ descriptor for this bucket. */ +/*0x08*/struct irq_desc *irq_info; /* Sun5 Interrupt Clear Register. */ /*0x10*/unsigned long iclr; @@ -69,12 +68,6 @@ struct ino_bucket { }; -#ifdef CONFIG_PCI -extern unsigned long pci_dma_wsync; -extern unsigned long dma_sync_reg_table[256]; -extern unsigned char dma_sync_reg_table_entry; -#endif - /* IMAP/ICLR register defines */ #define IMAP_VALID 0x80000000 /* IRQ Enabled */ #define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ @@ -90,11 +83,9 @@ extern unsigned char dma_sync_reg_table_entry; #define ICLR_PENDING 0x00000003 /* Pending state */ /* Only 8-bits are available, be careful. -DaveM */ -#define IBF_DMA_SYNC 0x01 /* DMA synchronization behind PCI bridge needed. */ -#define IBF_PCI 0x02 /* Indicates PSYCHO/SABRE/SCHIZO PCI interrupt. */ -#define IBF_ACTIVE 0x04 /* This interrupt is active and has a handler. */ -#define IBF_MULTI 0x08 /* On PCI, indicates shared bucket. */ -#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */ +#define IBF_PCI 0x02 /* PSYCHO/SABRE/SCHIZO PCI interrupt. */ +#define IBF_ACTIVE 0x04 /* Interrupt is active and has a handler.*/ +#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */ #define NUM_IVECS (IMAP_INR + 1) extern struct ino_bucket ivector_table[NUM_IVECS]; diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h index 4c15610a2bac..38bbbccb4068 100644 --- a/include/asm-sparc64/pbm.h +++ b/include/asm-sparc64/pbm.h @@ -145,6 +145,9 @@ struct pci_pbm_info { /* Physical address base of PBM registers. */ unsigned long pbm_regs; + /* Physical address of DMA sync register, if any. */ + unsigned long sync_reg; + /* Opaque 32-bit system bus Port ID. */ u32 portid; diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h index becdf1bc5924..e3059bb4a465 100644 --- a/include/asm-sparc64/signal.h +++ b/include/asm-sparc64/signal.h @@ -162,21 +162,6 @@ struct sigstack { #define MINSIGSTKSZ 4096 #define SIGSTKSZ 16384 -#ifdef __KERNEL__ -/* - * DJHR - * SA_STATIC_ALLOC is used for the SPARC system to indicate that this - * interrupt handler's irq structure should be statically allocated - * by the request_irq routine. - * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge - * of interrupt usage and that sucks. Also without a flag like this - * it may be possible for the free_irq routine to attempt to free - * statically allocated data.. which is NOT GOOD. - * - */ -#define SA_STATIC_ALLOC 0x80 -#endif - #include <asm-generic/signal.h> struct __new_sigaction { diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h index 70a4ebb5d964..ecb0d39c0798 100644 --- a/include/linux/compat_ioctl.h +++ b/include/linux/compat_ioctl.h @@ -346,10 +346,27 @@ COMPATIBLE_IOCTL(PPPOEIOCDFWD) /* LP */ COMPATIBLE_IOCTL(LPGETSTATUS) /* ppdev */ +COMPATIBLE_IOCTL(PPSETMODE) +COMPATIBLE_IOCTL(PPRSTATUS) +COMPATIBLE_IOCTL(PPRCONTROL) +COMPATIBLE_IOCTL(PPWCONTROL) +COMPATIBLE_IOCTL(PPFCONTROL) +COMPATIBLE_IOCTL(PPRDATA) +COMPATIBLE_IOCTL(PPWDATA) COMPATIBLE_IOCTL(PPCLAIM) COMPATIBLE_IOCTL(PPRELEASE) -COMPATIBLE_IOCTL(PPEXCL) COMPATIBLE_IOCTL(PPYIELD) +COMPATIBLE_IOCTL(PPEXCL) +COMPATIBLE_IOCTL(PPDATADIR) +COMPATIBLE_IOCTL(PPNEGOT) +COMPATIBLE_IOCTL(PPWCTLONIRQ) +COMPATIBLE_IOCTL(PPCLRIRQ) +COMPATIBLE_IOCTL(PPSETPHASE) +COMPATIBLE_IOCTL(PPGETMODES) +COMPATIBLE_IOCTL(PPGETMODE) +COMPATIBLE_IOCTL(PPGETPHASE) +COMPATIBLE_IOCTL(PPGETFLAGS) +COMPATIBLE_IOCTL(PPSETFLAGS) /* CDROM stuff */ COMPATIBLE_IOCTL(CDROMPAUSE) COMPATIBLE_IOCTL(CDROMRESUME) |