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author | Marc Zyngier <marc.zyngier@arm.com> | 2015-11-26 18:19:25 +0100 |
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committer | Christoffer Dall <christoffer.dall@linaro.org> | 2016-05-20 15:39:48 +0200 |
commit | 140b086dd19771410915a924db2e635c2b51a0f4 (patch) | |
tree | f1e99db1df02f242a00e8c347c84b8864cc26eed /include | |
parent | KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework (diff) | |
download | linux-140b086dd19771410915a924db2e635c2b51a0f4.tar.xz linux-140b086dd19771410915a924db2e635c2b51a0f4.zip |
KVM: arm/arm64: vgic-new: Add GICv2 world switch backend
Processing maintenance interrupts and accessing the list registers
are dependent on the host's GIC version.
Introduce vgic-v2.c to contain GICv2 specific functions.
Implement the GICv2 specific code for syncing the emulation state
into the VGIC registers.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/irqchip/arm-gic.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 9c940263ca23..be0d26f940af 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h @@ -76,6 +76,7 @@ #define GICH_LR_VIRTUALID (0x3ff << 0) #define GICH_LR_PHYSID_CPUID_SHIFT (10) #define GICH_LR_PHYSID_CPUID (0x3ff << GICH_LR_PHYSID_CPUID_SHIFT) +#define GICH_LR_PRIORITY_SHIFT 23 #define GICH_LR_STATE (3 << 28) #define GICH_LR_PENDING_BIT (1 << 28) #define GICH_LR_ACTIVE_BIT (1 << 29) |