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| author | Marc Zyngier <marc.zyngier@arm.com> | 2015-11-30 14:09:53 +0100 |
|---|---|---|
| committer | Christoffer Dall <christoffer.dall@linaro.org> | 2016-05-20 15:39:48 +0200 |
| commit | 59529f69f5048e50dcde3434661981c01f8208b4 (patch) | |
| tree | c3482bd96679aab30e60e973cf708f7ff83aa9fc /include | |
| parent | KVM: arm/arm64: vgic-new: Add GICv2 world switch backend (diff) | |
| download | linux-59529f69f5048e50dcde3434661981c01f8208b4.tar.xz linux-59529f69f5048e50dcde3434661981c01f8208b4.zip | |
KVM: arm/arm64: vgic-new: Add GICv3 world switch backend
As the GICv3 virtual interface registers differ from their GICv2
siblings, we need different handlers for processing maintenance
interrupts and reading/writing to the LRs.
Implement the respective handler functions and connect them to
existing code to be called if the host is using a GICv3.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index ec938d14da5d..35e93cfa1742 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -275,6 +275,7 @@ #define ICH_LR_ACTIVE_BIT (1ULL << 63) #define ICH_LR_PHYS_ID_SHIFT 32 #define ICH_LR_PHYS_ID_MASK (0x3ffULL << ICH_LR_PHYS_ID_SHIFT) +#define ICH_LR_PRIORITY_SHIFT 48 /* These are for GICv2 emulation only */ #define GICH_LR_VIRTUALID (0x3ffUL << 0) |