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author | Bjorn Helgaas <bhelgaas@google.com> | 2018-01-31 17:10:30 +0100 |
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committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-01-31 17:10:30 +0100 |
commit | 5be31686cf4752443e669f48843eed036c69f999 (patch) | |
tree | 2b13b1c012f929de0a897f1088c8c330b7e786a4 /include | |
parent | Merge branch 'pci/dt-resources' into next (diff) | |
parent | RDMA/qedr: Use pci_enable_atomic_ops_to_root() (diff) | |
download | linux-5be31686cf4752443e669f48843eed036c69f999.tar.xz linux-5be31686cf4752443e669f48843eed036c69f999.zip |
Merge branch 'pci/enumeration' into next
* pci/enumeration:
RDMA/qedr: Use pci_enable_atomic_ops_to_root()
PCI: Add pci_enable_atomic_ops_to_root()
PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/pci.h | 1 | ||||
-rw-r--r-- | include/uapi/linux/pci_regs.h | 4 |
2 files changed, 4 insertions, 1 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index d75d30e55976..22dfaff8bafc 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -2063,6 +2063,7 @@ void pci_request_acs(void); bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); bool pci_acs_path_enabled(struct pci_dev *start, struct pci_dev *end, u16 acs_flags); +int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask); #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 66d71461d2f0..c8586db4fb07 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -624,7 +624,9 @@ #define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ #define PCI_EXP_DEVCAP2_ARI 0x00000020 /* Alternative Routing-ID */ #define PCI_EXP_DEVCAP2_ATOMIC_ROUTE 0x00000040 /* Atomic Op routing */ -#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* Atomic 64-bit compare */ +#define PCI_EXP_DEVCAP2_ATOMIC_COMP32 0x00000080 /* 32b AtomicOp completion */ +#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */ +#define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */ #define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */ #define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */ #define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */ |