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author | Benjamin Gaignard <benjamin.gaignard@st.com> | 2020-06-03 14:54:36 +0200 |
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committer | Lee Jones <lee.jones@linaro.org> | 2020-06-18 12:19:42 +0200 |
commit | e0bcc58d876c6ece9720310509a908b7637e37cf (patch) | |
tree | 6133d043c60118471102bb8e428009330749db5e /include | |
parent | dt-bindings: mfd: Document STM32 low power timer bindings (diff) | |
download | linux-e0bcc58d876c6ece9720310509a908b7637e37cf.tar.xz linux-e0bcc58d876c6ece9720310509a908b7637e37cf.zip |
mfd: stm32: Add defines to be used for clkevent purpose
Add defines to be able to enable/clear irq and configure one shot mode.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mfd/stm32-lptimer.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/mfd/stm32-lptimer.h b/include/linux/mfd/stm32-lptimer.h index 605f62264825..90b20550c1c8 100644 --- a/include/linux/mfd/stm32-lptimer.h +++ b/include/linux/mfd/stm32-lptimer.h @@ -27,10 +27,15 @@ #define STM32_LPTIM_CMPOK BIT(3) /* STM32_LPTIM_ICR - bit fields */ +#define STM32_LPTIM_ARRMCF BIT(1) #define STM32_LPTIM_CMPOKCF_ARROKCF GENMASK(4, 3) +/* STM32_LPTIM_IER - bit flieds */ +#define STM32_LPTIM_ARRMIE BIT(1) + /* STM32_LPTIM_CR - bit fields */ #define STM32_LPTIM_CNTSTRT BIT(2) +#define STM32_LPTIM_SNGSTRT BIT(1) #define STM32_LPTIM_ENABLE BIT(0) /* STM32_LPTIM_CFGR - bit fields */ |