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| author | Michael Turquette <mturquette@baylibre.com> | 2015-12-23 22:08:56 +0100 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2015-12-23 22:08:56 +0100 |
| commit | a915e30dd26ea5f3cc2e2c044aba38ee5973d3fa (patch) | |
| tree | 0de1e6e8ea64b9a675a135722882cab4768b5002 /include | |
| parent | Merge branch 'clk-bcm2835' into clk-next (diff) | |
| parent | clk: rockchip: rk3036: include downstream muxes into fractional dividers (diff) | |
| download | linux-a915e30dd26ea5f3cc2e2c044aba38ee5973d3fa.tar.xz linux-a915e30dd26ea5f3cc2e2c044aba38ee5973d3fa.zip | |
Merge branch 'clk-rockchip' into clk-next
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/clk-provider.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 1796f7d8526c..1143e38555a4 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -31,6 +31,7 @@ #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */ #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ #define CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after notifications */ +#define CLK_SET_RATE_UNGATE BIT(10) /* clock needs to run to set rate */ struct clk; struct clk_hw; |