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authorArnd Bergmann <arnd@arndb.de>2015-03-04 21:14:47 +0100
committerArnd Bergmann <arnd@arndb.de>2015-03-04 21:14:47 +0100
commitbc761616864fedd1665ba7a0d68d3f4d9681408c (patch)
tree174ac29d991fa28fe7ded878bc9f280bebfe3dbf /include
parentMerge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff)
parentARM: at91/dt: keep watchdog running in idle mode (diff)
downloadlinux-bc761616864fedd1665ba7a0d68d3f4d9681408c.tar.xz
linux-bc761616864fedd1665ba7a0d68d3f4d9681408c.zip
Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Merge "First fixes batch for AT91 on 4.0" from Nicolas Ferre: - PM slowclock fixes for DDR and timeouts - fix some DT entries - little defconfig updates - the removal of a harmful watchdog option + its detailed documentation * tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: at91/dt: keep watchdog running in idle mode dts: Documentation: AT91 Watchdog, explain what atmel,idle-halt property really do ARM: at91/defconfig: add at91rm9200 ethernet support ARM: at91/defconfig: remove CONFIG_SYSFS_DEPRECATED ARM: at91/dt: at91sam9260: fix usart pinctrl ARM: at91/dt: sama5d4: add missing alias for i2c0 ARM: at91/dt: at91sam9263: Fixup sram1 device tree node ARM: at91: pm: fix SRAM allocation ARM: at91: pm: fix at91rm9200 standby pm: at91: Workaround DDRSDRC self-refresh bug with LPDDR1 memories. pm: at91: pm_slowclock: fix suspend/resume hang up in timeouts
Diffstat (limited to 'include')
-rw-r--r--include/soc/at91/at91sam9_ddrsdr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/soc/at91/at91sam9_ddrsdr.h b/include/soc/at91/at91sam9_ddrsdr.h
index 0210797abf2e..dc10c52e0e91 100644
--- a/include/soc/at91/at91sam9_ddrsdr.h
+++ b/include/soc/at91/at91sam9_ddrsdr.h
@@ -92,7 +92,7 @@
#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */
#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */
-#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */
+#define AT91_DDRSDRC_MD (7 << 0) /* Memory Device Type */
#define AT91_DDRSDRC_MD_SDR 0
#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3