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author | Seth Heasley <seth.heasley@intel.com> | 2011-04-20 01:35:15 +0200 |
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committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-05-11 00:43:36 +0200 |
commit | c0a86a9bea55d505574120f3e9775e3844276505 (patch) | |
tree | db811f3106e03f35886fd82f084a7531014c0e32 /include | |
parent | PCI: handle positive error codes (diff) | |
download | linux-c0a86a9bea55d505574120f3e9775e3844276505.tar.xz linux-c0a86a9bea55d505574120f3e9775e3844276505.zip |
x86/PCI: irq and pci_ids patch for Intel Panther Point DeviceIDs
This patch adds the LPC Controller DeviceIDs for the Intel Panther Point PCH.
Acked-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Seth Heasley <seth.heasley@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/pci_ids.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 4e2c9150a785..52f4ed4de490 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2480,6 +2480,9 @@ #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e40 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40 #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41 |