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| author | Aristeu Rozanski <aris@redhat.com> | 2014-06-18 16:05:01 +0200 |
|---|---|---|
| committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-06-26 20:46:55 +0200 |
| commit | 7b8278358cc2b453ca6e75eedb3741cdb7e97236 (patch) | |
| tree | d6bc903a68f1695da152cf31a8a7a70b9d51e490 /include | |
| parent | sb_edac: remove bogus assumption on mc ordering (diff) | |
| download | linux-7b8278358cc2b453ca6e75eedb3741cdb7e97236.tar.xz linux-7b8278358cc2b453ca6e75eedb3741cdb7e97236.zip | |
edac: add DDR4 and RDDR4
Haswell memory controller can make use of DDR4 and Registered DDR4
Cc: tony.luck@intel.com
Signed-off-by: Aristeu Rozanski <aris@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/edac.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/edac.h b/include/linux/edac.h index 8e6c20af11a2..e1e68da6f35c 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -194,6 +194,9 @@ static inline char *mc_event_error_type(const unsigned int err_type) * @MEM_DDR3: DDR3 RAM * @MEM_RDDR3: Registered DDR3 RAM * This is a variant of the DDR3 memories. + * @MEM_DDR4: DDR4 RAM + * @MEM_RDDR4: Registered DDR4 RAM + * This is a variant of the DDR4 memories. */ enum mem_type { MEM_EMPTY = 0, @@ -213,6 +216,8 @@ enum mem_type { MEM_XDR, MEM_DDR3, MEM_RDDR3, + MEM_DDR4, + MEM_RDDR4, }; #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) |