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authorMarc Zyngier <marc.zyngier@arm.com>2019-03-11 16:38:10 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2019-03-11 16:38:10 +0100
commitb41fdc4a7bf9045e4871c5b15905ea732ffd044f (patch)
tree4cdbaefe72458c801e026bed3b1a5516083e5ddc /include
parentirqchip/imx-irqsteer: Fix of_property_read_u32() error handling (diff)
downloadlinux-b41fdc4a7bf9045e4871c5b15905ea732ffd044f.tar.xz
linux-b41fdc4a7bf9045e4871c5b15905ea732ffd044f.zip
irqchip/gic: Drop support for secondary GIC in non-DT systems
We do not have any in-tree platform with this pathological setup, and only a single system (Cavium's cns3xxx) isn't DT aware. Let's drop the secondary GIC support for now, until we remove the above horror altogether. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/irqchip/arm-gic.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 626179077bb0..0f049b384ccd 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -158,8 +158,7 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq);
* Legacy platforms not converted to DT yet must use this to init
* their GIC
*/
-void gic_init(unsigned int nr, int start,
- void __iomem *dist , void __iomem *cpu);
+void gic_init(void __iomem *dist , void __iomem *cpu);
int gicv2m_init(struct fwnode_handle *parent_handle,
struct irq_domain *parent);