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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-06-26 10:13:38 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-07-12 10:52:03 +0200 |
| commit | 668756f7299d2d3c75add17cb415717e247450ef (patch) | |
| tree | 04cb2c88c37ccd6d8186f651b8b97192ede808b4 /include | |
| parent | clk: renesas: r9a07g044: Fix P1 Clock (diff) | |
| download | linux-668756f7299d2d3c75add17cb415717e247450ef.tar.xz linux-668756f7299d2d3c75add17cb415717e247450ef.zip | |
clk: renesas: r9a07g044: Add P2 Clock support
Add support for P2 clock which is sourced from pll3_div2_4_2.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210626081344.5783-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions