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authorAkshu Agrawal <akshu.agrawal@amd.com>2020-07-31 15:36:03 +0200
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2020-08-07 20:12:00 +0200
commit7f8802f2d2ed67ffbac9264f946a52507f749e19 (patch)
tree6c4a0d7e21b367334ea1de355dddfeb710f14b0e /include
parentclk: x86: Change name from ST to FCH (diff)
downloadlinux-7f8802f2d2ed67ffbac9264f946a52507f749e19.tar.xz
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ACPI: APD: Add a fmw property is_raven
Since there is slight difference in AMD RV based soc in misc clk architecture. The fmw property will help in differentiating the SoCs. Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/platform_data/clk-fch.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/platform_data/clk-fch.h b/include/linux/platform_data/clk-fch.h
index 850ca776156d..b9f682459f08 100644
--- a/include/linux/platform_data/clk-fch.h
+++ b/include/linux/platform_data/clk-fch.h
@@ -12,6 +12,7 @@
struct fch_clk_data {
void __iomem *base;
+ u32 is_rv;
};
#endif /* __CLK_FCH_H */