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| author | Bjorn Helgaas <bhelgaas@google.com> | 2012-06-23 19:59:43 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-06-23 19:59:43 +0200 |
| commit | 35e7f73c32ad44a931d918d04e317a7fb0c63e6e (patch) | |
| tree | e3cb8c89c8230aaa45a0f1b101decdc3b9831938 /include | |
| parent | Merge branch 'topic/jiang-mmconfig-v10' into next (diff) | |
| parent | PCI/PM: add PCIe runtime D3cold support (diff) | |
| download | linux-35e7f73c32ad44a931d918d04e317a7fb0c63e6e.tar.xz linux-35e7f73c32ad44a931d918d04e317a7fb0c63e6e.zip | |
Merge branch 'topic/huang-d3cold-v7' into next
* topic/huang-d3cold-v7:
PCI/PM: add PCIe runtime D3cold support
PCI: do not call pci_set_power_state with PCI_D3cold
PCI/PM: add runtime PM support to PCIe port
ACPI/PM: specify lowest allowed state for device sleep state
Diffstat (limited to 'include')
| -rw-r--r-- | include/acpi/acpi_bus.h | 6 | ||||
| -rw-r--r-- | include/linux/pci.h | 16 |
2 files changed, 15 insertions, 7 deletions
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 457974073994..6a6c46e84ae3 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -415,13 +415,13 @@ int acpi_enable_wakeup_device_power(struct acpi_device *dev, int state); int acpi_disable_wakeup_device_power(struct acpi_device *dev); #ifdef CONFIG_PM -int acpi_pm_device_sleep_state(struct device *, int *); +int acpi_pm_device_sleep_state(struct device *, int *, int); #else -static inline int acpi_pm_device_sleep_state(struct device *d, int *p) +static inline int acpi_pm_device_sleep_state(struct device *d, int *p, int m) { if (p) *p = ACPI_STATE_D0; - return ACPI_STATE_D3; + return (m >= ACPI_STATE_D0 && m <= ACPI_STATE_D3) ? m : ACPI_STATE_D0; } #endif diff --git a/include/linux/pci.h b/include/linux/pci.h index c739df91bac9..0769aa409085 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -132,9 +132,10 @@ static inline const char *pci_power_name(pci_power_t state) return pci_power_names[1 + (int) state]; } -#define PCI_PM_D2_DELAY 200 -#define PCI_PM_D3_WAIT 10 -#define PCI_PM_BUS_WAIT 50 +#define PCI_PM_D2_DELAY 200 +#define PCI_PM_D3_WAIT 10 +#define PCI_PM_D3COLD_WAIT 100 +#define PCI_PM_BUS_WAIT 50 /** The pci_channel state describes connectivity between the CPU and * the pci device. If some PCI bus between here and the pci device @@ -278,11 +279,18 @@ struct pci_dev { unsigned int pme_poll:1; /* Poll device's PME status bit */ unsigned int d1_support:1; /* Low power state D1 is supported */ unsigned int d2_support:1; /* Low power state D2 is supported */ - unsigned int no_d1d2:1; /* Only allow D0 and D3 */ + unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ + unsigned int no_d3cold:1; /* D3cold is forbidden */ + unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ unsigned int mmio_always_on:1; /* disallow turning off io/mem decoding during bar sizing */ unsigned int wakeup_prepared:1; + unsigned int runtime_d3cold:1; /* whether go through runtime + D3cold, not set for devices + powered on/off by the + corresponding bridge */ unsigned int d3_delay; /* D3->D0 transition time in ms */ + unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ #ifdef CONFIG_PCIEASPM struct pcie_link_state *link_state; /* ASPM link state. */ |