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| author | Olof Johansson <olof@lixom.net> | 2015-08-18 22:31:26 +0200 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-08-18 22:31:26 +0200 |
| commit | 582271a3d0c8eed65d8716cf8dba6fa04e9bfc85 (patch) | |
| tree | 489ee63427e27c3ab9b07074a30baa6181f3e4db /include | |
| parent | ARM: dts: vexpress: Use assigned-clock-parents for sp810 (diff) | |
| parent | ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain (diff) | |
| download | linux-582271a3d0c8eed65d8716cf8dba6fa04e9bfc85.tar.xz linux-582271a3d0c8eed65d8716cf8dba6fa04e9bfc85.zip | |
Merge tag 'renesas-dt4-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Fourth Round of Renesas ARM Based SoC DT Updates for v4.3
* Enable Clock Domain support of the Clock Pulse Generator (CPG)
Module Stop (MSTP) Clocks driver.
* tag 'renesas-dt4-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7791 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7779 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7778 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock Domain
clk: shmobile: rz: Add CPG/MSTP Clock Domain support
clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
clk: shmobile: Add CPG/MSTP Clock Domain support
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/clk/shmobile.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h index 63a8159c4e64..cb19cc1865ca 100644 --- a/include/linux/clk/shmobile.h +++ b/include/linux/clk/shmobile.h @@ -16,8 +16,20 @@ #include <linux/types.h> +struct device; +struct device_node; +struct generic_pm_domain; + void r8a7778_clocks_init(u32 mode); void r8a7779_clocks_init(u32 mode); void rcar_gen2_clocks_init(u32 mode); +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +void cpg_mstp_add_clk_domain(struct device_node *np); +int cpg_mstp_attach_dev(struct generic_pm_domain *domain, struct device *dev); +void cpg_mstp_detach_dev(struct generic_pm_domain *domain, struct device *dev); +#else +static inline void cpg_mstp_add_clk_domain(struct device_node *np) {} +#endif + #endif |