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authorNeil Armstrong <narmstrong@baylibre.com>2020-09-04 14:55:31 +0200
committerNeil Armstrong <narmstrong@baylibre.com>2020-09-11 15:01:36 +0200
commita328ca7e4af347e47742f36933df0fdac1c24ea5 (patch)
tree3d59c6782637babbe857008bc5eb0441b92e54be /include
parentdrm/bridge: dw-mipi-dsi: Use kmemdup cf. kmalloc+memcpy (diff)
downloadlinux-a328ca7e4af347e47742f36933df0fdac1c24ea5.tar.xz
linux-a328ca7e4af347e47742f36933df0fdac1c24ea5.zip
drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency higher than 10MHz for the TX Escape Clock, thus make the target rate configurable. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Philippe Cornu <philippe.cornu@st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200904125531.15248-1-narmstrong@baylibre.com
Diffstat (limited to 'include')
-rw-r--r--include/drm/bridge/dw_mipi_dsi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/bridge/dw_mipi_dsi.h b/include/drm/bridge/dw_mipi_dsi.h
index b0e390b3288e..bda8aa7c2280 100644
--- a/include/drm/bridge/dw_mipi_dsi.h
+++ b/include/drm/bridge/dw_mipi_dsi.h
@@ -36,6 +36,7 @@ struct dw_mipi_dsi_phy_ops {
unsigned int *lane_mbps);
int (*get_timing)(void *priv_data, unsigned int lane_mbps,
struct dw_mipi_dsi_dphy_timing *timing);
+ int (*get_esc_clk_rate)(void *priv_data, unsigned int *esc_clk_rate);
};
struct dw_mipi_dsi_host_ops {